A lot of these is a supercomputing Dyson swarm.
Also do chips in space need casing or could the wafers be just exposed on that back layer?
edit: I think the optimal packing could be a simple rolled-up scroll, that unfurls in space into a ribbon. A very lazy design where the ribbon has no orientation control, randomly furls and knots; and only half of it is (randomly) facing the sun at any given time. And the compute units are designed work under those conditions—as they are to be robust against peers randomly disappearing to micrometeorites, to space radiation, and so forth.
Because, you could make up for everything in quantity. A small 3x5 meter cylinder of rolled-up foil stores—at the mm-thickness scale, 10's of gigawatts of compute; at the micron scale, 10's of terawatts. Of course that end is far-future sci-fi stuff!
Even in LEO they benefit tremendously from radiation shielding, even a couple millimeters of aluminum greatly reduces the total ionizing dose. Also LEO has the issue of monatomic oxygen in the thermosphere which tends to react aggressively with the surface of anything it touches. An aluminium spacecraft structure isn't really affected, but I don't think it'd be very good for a semiconductor wafer.
Only a big power-efficient chip like M2 Ultra could survive if it could _only_ radiate from one side of the wafer into CMB.
The rest of the silicon will become molten at 100% TDP: H100, Xeon, Core, EPYC, Ryzen.
Most would be over 400C at 1% TDP.
Conduction and convection are linear or close and are effective at desirable temperatures, whereas thermal radiation is quartic and highly convex.