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The 8-Bit Era's Weird Uncle: The TI-99/4A

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168 points rbanffy | 1 comments | | HN request time: 0s | source
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PaulHoule ◴[] No.43109081[source]
I guess next week they're going to get to the interesting bit which is how weird the architecture actually was on that thing...

https://en.wikipedia.org/wiki/TI-99/4A

Particularly it only had 256 bytes of RAM attached to the CPU but had (I think) 16 kb of RAM attached to the video controller which the CPU could read and write through I/O registers. You could use this for non-video storage but you couldn't access it directly.

Coding in BASIC could, at the very least, hide the insanity from you.

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phire ◴[] No.43109851[source]
It gets way weirder.

The TMS9900 didn't have any internal data registers. It only had a program counter, a status register, and a workspace pointer. Instead, it put the "registers" in that same 256 bytes of RAM. There were sixteen 16-bit registers which the workspace pointer pointed to.

The original idea was that this made for fast context switches, instead of dumping all registers to stack (it doesn't even have a stack pointer), just update the workspace pointer to point at a new set. But I have to assume this wasn't really used on the TI-99/4A, as there just wasn't enough RAM. Because your only other ram was locked behind the video controller, that 256 bytes had to contain all your registers, any your dynamically loaded code and any data you wanted rapid access to.

The TMS9900 is weird, because it's the only CPU of the early home computer era that wasn't designed for microcomputers. It's actually an implementation of the TI-990 mini-computer on a single chip and is actually used in later versions of the minicomputer. Those minicomputers had more than enough fast 16-bit memory to take advantage of this fast context switching.

Every other commonly used microprocessor of the 70s (8080, 6800, F8, 6502, RCA1802, Z80, 6809, 8086, 68000) was explicitly designed to target the low-cost microcomputer market.

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1. OhMeadhbh ◴[] No.43117789[source]
So before people start saying "OMG! Memory-to-Memory architectures are so slow! What a stupid idea!" allow me to remind people that back in the early 70s when the 960 was turning into the 990, external bipolar memory was faster than on-chip NMOS static RAM. And since the 960 and 990 were originally implemented with a weird collection of ASICs, discrete parts and 7400-series logic chips, the idea that you would just drop a bipolar part in the design wasn't that weird of an idea. But then as the 990 evolved and TI built a single chip implementation, they retained the memory-to-memory architecture for software compatibility reasons. So yeah... ultimately... CMOS logic got faster than bipolar memory and in retrospect it wasn't the greatest design. But at the time it wasn't THAT bad of an idea. And yeah, it did make task switching very fast. But don't get me started on serial IO off the CPU. And dang, what a great, largely orthogonal instruction set. I sometimes fire up the Assembler / Editor on my 99/4 emulator just to play with it.

Anywho... this isn't a critique of the OP or @phire, it's a reminder for the community at large that tech decisions that seem bad in retrospect often had non-idiotic motivations at the time.