One bit, but it's a bit of the underlying signal layer which has a 1-2% redundancy over the actual data. PCIe 2.0 and earlier encode 8b data in 10b signal. 3.0 to 5.0 encode 128b data in 130b signal. 6.0 and 7.0 do a more complicated thing:
https://pcisig.com/blog/pcie%C2%AE-60-specification-webinar-...Also the speed is per lane, eg an x8 slot / port / device is called that because it has 8 lanes, which all transfer in parallel.