Show HN: An LLM-Powered Tool to Catch PCB Schematic Mistakes

Would this catch physical interference issues from known components? e.g. conflict spacing, connector pin-out chirality?

I know a brilliant PCB engineer whose first major multimillion dollar R&D corporate design (decades ago) resulted in production of a modular product which couldn't physically plug in with the rest of the system (because of above issues)... I'll send him this link to see if he'll give you feedback, but that's going to be how he'd initially test your AI system (he considers it a humbling lifetime blunder).

Without any PCB design experience, my presumption is that OP's "AI product" is more of just a "fundamentals of circuit board design"[0] and not an all-expansive "how did no human ever catch such a simple multi-dimensional clash"[1]

[0] isolated voltage areas; trace attenuation avoidance; signal protection

[1] the darn thing won't even plug in, because the plug is pin'd-out backwards

Hi! Great question. Right now the tool focuses on issues that show up in the schematic. So it’s very well-equipped to handle a lot of the classic “how did no human ever catch this” mistakes — things like reversed polarity, TX/RX getting swapped, missing pull-ups, etc.

But it sounds like in this case the root cause was more of a footprint/layout issue rather than a schematic one. I’m hoping to add footprint-level checks later on, once I can ingest full board files and mechanical data.

This is a solved problem nowadays. Pretty much every pcb package produces 3D models you can plug into your existing CAD/CAM product design infrastructure.

3D is pretty solved, yes.

Pinouts... there is a reason we try to get all pinouts tested as early as possible, preferably on the first non-form-factor prototype spin if we can. In no event should key pinouts be first assigned or major changes made without a planned spin in the schedule following them....