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226 points 0xkato | 1 comments | | HN request time: 0.307s | source
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drbig ◴[] No.45805856[source]
Instruction pipelining and this is exactly why I wish we still have the time to go back to "it is exactly as it is", think the 6502 or any architecture that does not pretend/map/table/proxy/ringaway anything.

That, but a hell lot of it with fast interconnect!

... one can always dream.

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ojbyrne ◴[] No.45806633[source]
The article is essentially describing virtual memory (with enhancements) which predates the 6502 by a decade or so.
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1. Delk ◴[] No.45811448[source]
IMO it's not even quite right in its description. The first picture that describes virtual memory shows all processes as occupying the same "logical" address space with the page table just mapping pages in the "logical" address space to physical addresses one-to-one. In reality (at least in all VM systems I know of) each process has its own independent virtual address space.