I can't wrap my head around possible yields, as the method relies on diamond crystals forming in the heat-conducting pillars within the chip, so if the process less than perfect - it can be a source of delayed failure from termal issues within the chip. It also look like a heat-conducting grid would further decrease usable space and the whole wafer needs to be designed around it.
That said, mentioned temperature gains are absolutely and utterly insane even if they come with some high-frequency issues.
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