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200 points rbanffy | 2 comments | | HN request time: 0.456s | source
1. everlier ◴[] No.45657090[source]
I can't wrap my head around possible yields, as the method relies on diamond crystals forming in the heat-conducting pillars within the chip, so if the process less than perfect - it can be a source of delayed failure from termal issues within the chip. It also look like a heat-conducting grid would further decrease usable space and the whole wafer needs to be designed around it.

That said, mentioned temperature gains are absolutely and utterly insane even if they come with some high-frequency issues.

replies(1): >>45659791 #
2. FaradayRotation ◴[] No.45659791[source]
Oh man, the integrated problems this will cause for the manufacturing engineers will be of nightmare level. You wont really get to properly test how well you made the heat pipe network until end of line! Hopefully they will be able to drum up some inline metrology to test the heat pipes before then...

This on top of all the through-silicon-vias and backside power delivery would make even the crustiest of engineers weep...