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Athlon 64: How AMD turned the tables on Intel

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331 points giuliomagnifico | 3 comments | 25 Sep 25 18:09 UTC | HN request time: 0.21s | source
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bombcar ◴[25 Sep 25 18:42 UTC] No.45377061[source]▶
Youngsters today don't remember it; x86 was fucking dead according to the press; it really wasn't until Athlon 64 came out (which gave a huge bump to Linux as it was one of the first OSes to fully support it - one of the reasons I went to Gentoo early on was to get that sweet 64 bit compilation!) that everyone started to admit the Itanium was a turd.

The key to the whole thing was that it was a great 32 bit processor; the 64 bit stuff was gravy for many, later.

Apple did something similar with its CPU changes - now three - they only swap when the old software runs better on the new chip even if emulated than it did on the old.

AMD64 was also well thought out; it wasn't just a simple "have two more bytes" slapped on 32 bit. Doubling the number of general purpose registers was noticeable - you took a performance hit going to 64 bit early on because all the memory addresses were wider, but the extra registers usually more than made up for it.

This is also where the NX bit entered.

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drob518 ◴[25 Sep 25 18:51 UTC] No.45377177[source]▶
Itanium wasn’t a turd. It was just not compatible with x86. And that was enough to sink it.
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cmrdporcupine ◴[25 Sep 25 19:15 UTC] No.45377560[source]▶
Itanium was pointless when Alpha existed already and was already getting market penetration in the high end market. Intel played disgusting corporate politics to kill it and then push the ugly failed Itanium to market, only to have to panic back to x86_64 later.

I have no idea how/why Intel got a second life after that, but they did. Which is a shame. A sane market would have punished them and we all would have moved on.

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1. j_not_j ◴[26 Sep 25 01:24 UTC] No.45381495[source]▶
Alpha had a lot of implementation problems, e.g. floating point exceptions with untraceable execution paths.

Cray tried to build the T3E (iirc) out of Alphas. DEC bragged how good Alpha was for parallel computing, big memory etc etc.

But Cray publicly denounced Alpha as unusable for parallel processing (the T3E was a bunch of Alphas in some kind of NUMA shared memory.) It was so difficult to make the chips work together.

This was in the Cray Connect or some such glossy publication. Wish I'd kept a copy.

Plus of course the usual DEC marketing incompetence. They feared Alpha undoing their large expensive machine momentum. Small workstation boxes significantly faster than big iron.

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2. jabl ◴[26 Sep 25 10:21 UTC] No.45384852[source]▶
The Cray T3D and T3E used Alpha processors. But it wasn't really shared memory, each node with 1/(2?) CPU's ran it's own lightweight OS kernel. There were some libraries built on top of it (SHMEM) that sort-of made it look a bit like shared memory, but not really. Mostly it was a machine for running MPI applications.

A decade or so later on, they more or less recreated the architecture but this time with 64-bit Opteron CPU's in the form of the 'Red Storm' supercomputer for Sandia. Which then became commercially available as the XT3. And later XT4/5/6.

3. p_l ◴[26 Sep 25 12:34 UTC] No.45385774[source]▶
Part of the issue was also that it was Cray's first proper MPP system, after being very much against MPP designs in the past.