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304 points Bogdanp | 2 comments | 14 Sep 25 15:44 UTC | HN request time: 0.669s | source

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WD-42 ◴[14 Sep 25 16:55 UTC] No.45241312[source]▶

Zig really is amenable to OS development. And so is RISC-V. I started this same exercise except with x86 first. I quickly got annoyed with all the legacy boilerplate required. RISC-v doesn’t have any of that. It’s so much faster to get up and running. Here’s my bad zig: https://github.com/Fingel/aeros-v

replies(3): >>45241487 #>>45242520 #>>45246843 #

1. josephg ◴[14 Sep 25 19:25 UTC] No.45242520[source]▶

>>45241312 #

I’d like to have a go at this. What are you using to run your risc-v kernel? Just Qemu or can you recommend any real hardware?

replies(1): >>45242613 #

2. WD-42 ◴[14 Sep 25 19:37 UTC] No.45242613[source]▶

>>45242520 (TP) #

Just Qemu. I used this as a guide: https://operating-system-in-1000-lines.vercel.app/en/ It's C so translating to Zig is pretty fun.

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Writing an operating system kernel from scratch