Intel Patents 'Software Defined Supercore'

> On the software side, the system uses either a JIT compiler, static compiler, or binary instrumentation to split a single-threaded program into code segments to assign different blocks to different cores. It injects special instructions for flow control, register passing, and sync behavior, enabling the hardware to maintain execution integrity.

Itanium is back again?

As bad as it worked out I don't think Itanium tried to break Amdahl's law. And that is how I understand this magic multicore execution of single-thread code.

With Itanium they assumed that "smart compilers" would locally parallelize programs.

I'm surprised they even pursued this line of research, though they may be considering it just as a basic territory claim that they don't have a high expectation of turning into anything. Research into "implicit parallelism" has been done a lot over the years and the consistent result has been that there is a lot less than people intuitively think, and I mean, a lot less. I wouldn't hold out much hope for this... but then again, in a world of nearly frozen clock speeds, it wouldn't take much to stand out.

> Itanium is back again?

Itanium was also the trojan horse against competing architectures. From that POV, it succeeded.

I always thought there was value in a simpler take on this. Especially in the commercial-software world, not everything is compiled for the exact foibles of your current CPU.

Why aren't we running a JIT from x86 to "optimized subset of x86"? how much performance could it buy us?

They kinda do - microcode translates x86(_64) into micro-opts for actual execution. If you go back far enough to the P6 the actual execution core was essentially RISC [1]

[1] https://news.ycombinator.com/item?id=36380149