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MIPS – The hyperactive history and legacy of the pioneering RISC architecture

(thechipletter.substack.com)
75 points rbanffy | 1 comments | 21 Jul 25 18:31 UTC | HN request time: 0s | source
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frollogaston ◴[21 Jul 25 20:00 UTC] No.44639784[source]▶
UC Berkeley's intro to computer architecture course still uses MIPS for projects and exam questions.
replies(4): >>44639962 #>>44640026 #>>44641176 #>>44642192 #
Ar-Curunir ◴[21 Jul 25 20:18 UTC] No.44639962[source]▶
CS61C uses RISC-V now.
replies(2): >>44640184 #>>44640313 #
bitwize ◴[21 Jul 25 20:55 UTC] No.44640313[source]▶
Makes sense. Isn't MIPS like a commercial variant of RISC-I?
replies(1): >>44640353 #
1. chasil ◴[21 Jul 25 20:59 UTC] No.44640353[source]▶
IIRC, Berkeley RISC was mainly SPARC, although it was also the AMD 29k.

Stanford was MIPS.