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How does a screen work?

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573 points chkhd | 1 comments | 13 Jul 25 14:09 UTC | HN request time: 0.246s | source
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rocqua ◴[14 Jul 25 07:22 UTC] No.44557309[source]▶
I'm much more interested in the hardware driver. This thing gets digital encoded input, has to decode it, and then multiplex it to 8 million pixels. 60 times a second. Being able to hit at least 4 million different levels (talking about 4K 60fps 12 bit color).

The input is roughly serial, so it takes a massive serial to parallel conversion.

replies(2): >>44557381 #>>44558311 #
1. myself248 ◴[14 Jul 25 10:18 UTC] No.44558311[source]▶
But the output of the scaler chip is still serial, just now it's guaranteed to have the same dimensions as the panel itself, and includes whatever OSD overlay might be active, and any gamma/contrast/whatever adjustments. I believe in some cases, this is also where dithering takes place, to take a 6-bit panel and try to give it 7-bit (or, yikes, 8-bit) color depth by PWMing pixels that have intermediate values.

Look at the connector pinout of the panel itself. There's only 50 pins or so, and a lot of them are grounds. Whether the scaler-to-panel format is eDP, or LVDS (FPD-Link), or V-by-One, it's all still differential serial lanes at that point.

Around the perimeter of the panel, then, are the actual TCON and row/column driver chips, bonded right to the ITO traces on the glass, flip-chip-on-glass style. These have an outrageous number of pins, and directly connect to the gate (row) and source (column) traces. It's here that the serial becomes parallel, and the next stop is the transistors themselves (hence the MOSFET signal terminology of gate and source) in the individual pixels.

Older displays would have basically a bunch of serial-to-parallel register chips with each one's SO connected to the next one's SI. I ran across a fasincating video of replacing a bad chip in such a display, which happens to be gas plasma so the voltages involved are also pretty high too:

https://www.youtube.com/watch?v=6W3H5wOy5sY