GlobalFoundries to Acquire MIPS

Put that in your delay slot and smoke it.

https://en.wikipedia.org/wiki/Delay_slot

I'm surprised by how many other architectures use it.

Whoa, had no idea this existed. Wild stuff. Might be "somewhat" confusing to read assembler code like that without knowing about this particular technique..

Allow me to introduce you to register windows.

https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...

Both register windows and the delay slot exist on SPARC processors, which you’re much more likely to run into in a data center (running open-source software).

Itanium was the really odd one — it not only used register windows but could offload some of the prior windows onto the heap. Most people would probably never notice… unless you’re trying to get a conservative scanning GC working and are stumped why values in some registers seem to not be traced…

Pour one out for Itanium. It tried to make the panacea of VLIW and branch hints work, but it didn't pan out.

VLIW is maybe cool, but people will be relieving themselves on EPIC's grave for the pain that it inflicted on them.

Like if you tried to debug a software crash on Itanium. The customer provided core dump was useless as you could not see what was going on. Intel added a debug mode to their compilers which disabled all that EPIC so hopefully you could reproduce the crash there, or on other CPU architectures. Otherwise you were basically screwed.