Still, no consumer based RV23 mini-ITX or micro-ATX or ATX form factor devices.
And Orange PI 2 has a GFX blob issue.
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There are SoCs on the market that implement RVV (Vector extensions), and SoCs on the market that implement H (Hypervisor extensions).
There are no SoCs on the market that implement both at the same time. And both are mandatory for RVA23.
I'd love to be proven wrong on the hardware availability. If there's hardware to be bought in western countries that implements both RVV and H, please let me know.
Sure. But there are RVA22+V such devices. RVA23 will eventually succeed these.
Many IP vendors announced RVA23 cores, but understand that the process from having a core design available for licensing to having a chip is very long, measured in years.
Among the designs that are further down in the pipeline of development, a highlight is Tenstorrent's Ascalon. According to them, a tapeout is "imminent". This was in the RISC-V Summit EU a few weeks ago. That'd mean RVA23 chips competitive with Zen5 in early 2026.
I think that's fine, as an outsider without any RISC-V board around, alignment in the future seems better than a board out today given performance is AFAIK still awfully subpar.
As a potential consumer all I want is that by the time RISC-V really hits the market people don't start hitting edge cases like toes on furniture with missing extensions that ended up being critical to properly run the software they need. I don't want another shitshow like USB-C fast-charging where consumers can't easily tell if a cable will work fine or end up in a slow charge fallback.
I'd rather see RISC-V for the more general public coming out later than starting with the wrong foot.
Veyron V2 has comparable perf per GHz to Zen4/5, but at a lower clock frequency (N4: 3.25, N3: 3.85): https://www.ventanamicro.com/technology/risc-v-cpu-ip/
Ascalon is about half as fast as Veyron V2, partially due to lower clock frequency (~2.6 GHz): https://riscv.or.jp/wp-content/uploads/Japan_RISC-V_day_Spri... It's really more designed as a "we need a decently fast and efficient CPU for our AI accelerator" then a "let's build the fastes CPU possible".
We are not running supercomputers at home.
We need to be able Math software on modern open hardware We need to be able to program with a better assembly We need to be able to have predictable code generation from our compilers We need to play with a new architecture and port software as an exercise We need to have choice