YC is wrong about LLMs for chip design

> While LLMs are capable of writing functional Verilog sometimes, their performance is still subhuman.

The key word here is "still".

We don't know what the limits of LLMs are.

It's possible that they will reach a dead end. But it is also possible that they will be able to do logic and math.

If (or when) they achieve that point, their performance will quickly become "superhuman" in these kinds of engineering tasks.

But the very next step will be the ability to do logic and math.

Reportedly, they've already hit the dead end: the newest Orion is marginally better than previous ChatGPT model (it's also marginally worse than it in some applications), and there is just no more fresh, non-AI generated data of somewhat good quality to train on.