YC is wrong about LLMs for chip design

They (YC) are interested in the use of LLMs to make the process of designing chips more efficient. Nowhere do they talk about LLMs actually designing chips.

I don't know anything about chip design, but like any area in tech I'm certain there are cumbersome and largely repetitive tasks that can't easily be done by algorithms but can be done with human oversight by LLMs. There's efficiency to be gained here if the designer and operator of the LLM system know what they're doing.

Except that’s now a very standard pitch for technology across basically any industry, and cheapens the whole idea of YC presenting a grand challenge.