←back to thread

150 points sohkamyung | 1 comments | | HN request time: 0.2s | source
Show context
v1ne ◴[] No.42131132[source]
This JH7110 is from 2021. Some specs: https://www.cnx-software.com/2022/08/29/starfive-jh7110-risc...

1.5 GHz CPU core frequency, some old RISC-V cores while we're still waiting for cores with decent single-core performance to compete with modern desktop processors.

Sorry, but for me this board is dead in the water, unless you can't use ARM/x86 for political reasons.

replies(2): >>42131171 #>>42131448 #
0x457 ◴[] No.42131171[source]
It's a dev board. Reason to buy it: you need a desktop that has RISC-V cpu inside.
replies(2): >>42131225 #>>42131356 #
adgjlsfhk1 ◴[] No.42131225[source]
The problem is that it's a dev board that will likely be slower than QEMU, and is missing half of the Risc-V extensions that you want to test with. (and it supports a maximum of 8gb of ram, so good luck compiling LLVM on it)
replies(2): >>42131651 #>>42131656 #
snvzz ◴[] No.42131651[source]
>good luck compiling LLVM on it

4 cores, thus 2GB/core. Plenty.

replies(3): >>42131949 #>>42133046 #>>42133315 #
AlotOfReading ◴[] No.42131949[source]
I regularly get OOMs at 16 GB/core doing debug builds. LLVM is practically a memory stress test.
replies(1): >>42139276 #
1. 0x457 ◴[] No.42139276[source]
Only if you use FatLTO. I've compiled LLVM many times with less memory.

GCC on the other hand is another story. On a machine that I was able to compiled LLVM (thanks swap), I couldn't even extract GCC source code.