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DeepComputing: Early Access Program for RISC-V Mainboard for Framework Laptop 13

(deepcomputing.io)
150 points sohkamyung | 1 comments | 13 Nov 24 22:07 UTC | HN request time: 0s | source
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v1ne ◴[13 Nov 24 22:55 UTC] No.42131132[source]▶
This JH7110 is from 2021. Some specs: https://www.cnx-software.com/2022/08/29/starfive-jh7110-risc...

1.5 GHz CPU core frequency, some old RISC-V cores while we're still waiting for cores with decent single-core performance to compete with modern desktop processors.

Sorry, but for me this board is dead in the water, unless you can't use ARM/x86 for political reasons.

replies(2): >>42131171 #>>42131448 #
0x457 ◴[13 Nov 24 23:00 UTC] No.42131171[source]▶
It's a dev board. Reason to buy it: you need a desktop that has RISC-V cpu inside.
replies(2): >>42131225 #>>42131356 #
adgjlsfhk1 ◴[13 Nov 24 23:07 UTC] No.42131225[source]▶
The problem is that it's a dev board that will likely be slower than QEMU, and is missing half of the Risc-V extensions that you want to test with. (and it supports a maximum of 8gb of ram, so good luck compiling LLVM on it)
replies(2): >>42131651 #>>42131656 #
snvzz ◴[14 Nov 24 00:04 UTC] No.42131651[source]▶
>good luck compiling LLVM on it

4 cores, thus 2GB/core. Plenty.

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1. CoastalCoder ◴[14 Nov 24 03:58 UTC] No.42133046[source]▶
I can't remember if LLVM has this problem specifically, but the linker step with debug info can really explode the memory use.

And unfortunately, that's even without build parallelism.