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150 points sohkamyung | 5 comments | | HN request time: 0s | source
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v1ne ◴[] No.42131132[source]
This JH7110 is from 2021. Some specs: https://www.cnx-software.com/2022/08/29/starfive-jh7110-risc...

1.5 GHz CPU core frequency, some old RISC-V cores while we're still waiting for cores with decent single-core performance to compete with modern desktop processors.

Sorry, but for me this board is dead in the water, unless you can't use ARM/x86 for political reasons.

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brucehoult ◴[] No.42131448[source]
> This JH7110 is from 2021.

First retail customer deliveries of mass-production JH7110 chip and board were February 2023. First laptops with it were at the end of 2023.

The CPU cores used (U74) were announced in October 2018. The first high-priced dev boards using essentially test chips (HiFive Unmatched $650, BeagleV Starlight unknown price, 300 were made and given away to developers) were mid 2021.

It is important to distinguish the dates of availability of RTL for a core, first tests chips of a complete SoC using it, and mass-production as there is usually several years between each stage.

You hear about all these dates in the RISC-V and Arm worlds where each thing (core, SoC, board) is done by different companies, each with a vendor-customer relationship with the previous stage company. You don't hear about them in the more vertically-integrated x86 and Apple worlds.

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1. therealcamino ◴[] No.42132679[source]
That's true, you don't hear about these dates in vertically-integrated businesses, but it's a bit of a misdirection. Vertically-integrated manufacturers definitely don't take 6 years from RTL completion to mass production of the end product.
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2. brucehoult ◴[] No.42133152[source]
That's because they are vertically-integrated and can overlap the different stages and have the board people give feedback to the SoC people, who can give feedback to the CPU core people.

With multiple vendor-customer relationships in the chain there is not only likely to be no overlap in stages, but even there may be 6, 12, 24 months of gap between the RTL for the core being available and someone even making a decision to make an SoC using those cores, and a similar gap from a chip being available to someone else deciding to buy it to design a motherboard around it.

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3. Dylan16807 ◴[] No.42133827[source]
Those delays are very understandable but they don't make the chips less old, or counteract the problems caused by being old when RISC-V is racing to catch up.
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4. brucehoult ◴[] No.42133999{3}[source]
The people who put out RTL for a core go right on to making a better core. The time they take to design a new core is not affected by how long people making SoCs or boards or consumer products do or don't take to make their own products.

Are you aware that major chip company Microchip just announced a new family of chips, the PIC64GX -- a big deal for them -- with a dev board that has just become available in the last month or so, which uses RISC-V cores first used in the HiFive Unleashed in early 2018 (and announced in Oct 2017, when they already had working test chips)?

https://www.microchip.com/en-us/development-tool/curiosity-p...

Are you aware that people still announce new chips based on the Arm A53, a core announced in 2012?

Or that 70% of Arm's revenue comes from CPU cores announced in 1994 (ARM7TDMI) - 2009 (Cortex-M0)?

"Old" is not relevant to anything. Only design features are relevant.

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5. Dylan16807 ◴[] No.42134129{4}[source]
> The time they take to design a new core is not affected by how long people making SoCs or boards or consumer products do or don't take to make their own products.

I don't think anyone implied otherwise. But the product in my hand is still lacking.

> Are you aware that major chip company Microchip

I don't see how this affects my argument in any way?

> Are you aware that people still announce new chips based on the Arm A53, a core announced in 2012?

Not for the main cores of laptops they don't.

> "Old" is not relevant to anything. Only design features are relevant.

There is sufficient context here to tie the two together. These cores are slow because of relative lack of development time. These cores lack vector units specifically because of their age, because they were designed before there was a spec (which you brought up).