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1. cperciva ◴[06 Nov 24 21:20 UTC] No.42069585[source]▶

We use atomic operations to update the pointers in a thread-safe manner

Are you sure about that? Atomics are not locks, and not all systems have strong memory ordering.

replies(3): >>42070126 #>>42070474 #>>42070917 #

2. jpc0 ◴[06 Nov 24 21:58 UTC] No.42070126[source]▶

>>42069585 (TP) #

> ... update the pointers ...

Pretty sure ARM and x86 you would be seeing on AWS does have strong memory ordering, and has atomic operations that operate on something the size of a single register...

replies(1): >>42070251 #

3. cperciva ◴[06 Nov 24 22:09 UTC] No.42070251[source]▶

>>42070126 #

Graviton has weaker memory ordering than amd64. I know this because FreeBSD had a ring buffer which was buggy on Graviton...

4. Sesse__ ◴[06 Nov 24 22:25 UTC] No.42070474[source]▶

>>42069585 (TP) #

Rust atomics, like C++ atomics, include memory barriers (the programmer chooses how strong, the compiler/CPU is free to give stronger).

5. CodesInChaos ◴[06 Nov 24 23:01 UTC] No.42070917[source]▶

>>42069585 (TP) #

> not all systems have strong memory ordering

Atomics require you to explicitly specify a memory ordering for every operation, so the system's memory ordering doesn't really matter. It's still possible to get it wrong, but a lot easier than in (traditional) C.

replies(1): >>42071585 #

6. reitzensteinm ◴[07 Nov 24 00:06 UTC] No.42071585[source]▶

>>42070917 #

It's still possible to incorrectly use relaxed operations, and have your algorithm only incidentally work because the compiler hasn't reordered them and you're on a CPU with a stronger memory model.

But yes, it's an order of magnitude easier to get portability right using the C++/Rust memory model than what came before.

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