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499 points baal80spam | 1 comments | | HN request time: 1.33s | source
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INTPenis ◴[] No.42056387[source]
I'm not a HW guy but my HW friends have been designing HCI solutions with AMD for maximum IO throughput because AMD CPUs have more PCI lanes.
replies(1): >>42056501 #
storrgie ◴[] No.42056501[source]
I think for _most_ people it comes down to this: how much can I cram into the platform. More lanes is more high speed storage, special purpose processing, and networking interfaces.
replies(1): >>42057121 #
1. wmf ◴[] No.42057121[source]
VMware users are starting to say that Epyc is too powerful for one server because they don't want to lose too much capacity due to a single server failure. Tangentially related, network switch ASICs also have too much capacity for a single rack.