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Box64 and RISC-V in 2024: What It Takes to Run the Witcher 3 on RISC-V

(box86.org)
366 points pabs3 | 1 comments | 27 Aug 24 04:23 UTC | HN request time: 0.258s | source
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Manfred ◴[27 Aug 24 08:31 UTC] No.41365540[source]▶
> At least in the context of x86 emulation, among all 3 architectures we support, RISC-V is the least expressive one.

RISC was explained to me as a reduced instruction set computer in computer science history classes, but I see a lot of articles and proposed new RISC-V profiles about "we just need a few more instructions to get feature parity".

I understand that RISC-V is just a convenient alternative to other platforms for most people, but does this also mean the RISC dream is dead?

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1. ahartmetz ◴[27 Aug 24 08:56 UTC] No.41365644[source]▶
The explanation that I've seen is that it's "(reduced instruction) set computer" - simple instructions, not necessarily few.