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I got almost all of my wishes granted with RP2350

(dmitry.gr)
700 points elipsitz | 1 comments | 08 Aug 24 13:03 UTC | HN request time: 0.202s | source
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jonathrg ◴[08 Aug 24 15:25 UTC] No.41192541[source]▶
Can someone explain the benefit of having essentially 4 cores (2 ARM + 2 RISC-V) on the chip but only having 2 able to run simultaneously? Does this take significantly less die space than having all 4 available at all times?
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1. blihp ◴[08 Aug 24 18:21 UTC] No.41194655[source]▶
Beyond the technical reasons for the limit, it provides for a relatively painless way to begin to build out/for RISC-V[1] without an uncomfortable transition. For those who just want a better next iteration of the controller, they have it. For those who build tools, want to A/B test the architectures, or just do whatever with RISC-V, they have that too. All without necessarily setting the expectation that both will continue to coexist long term.

[1] While it's possible they are envisioning dual architecture indefinitely, it's hard to imagine why this would be desirable long term esp. when one architecture can be royalty free and the other not, power efficiency, paying for dark silicon etc.