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700 points elipsitz | 1 comments | | HN request time: 0.22s | source
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jonathrg ◴[] No.41192541[source]
Can someone explain the benefit of having essentially 4 cores (2 ARM + 2 RISC-V) on the chip but only having 2 able to run simultaneously? Does this take significantly less die space than having all 4 available at all times?
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1. ◴[] No.41192589[source]