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1080 points antipaul | 4 comments | | HN request time: 0.356s | source
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zdw ◴[] No.25066465[source]
AMD's Zen 3 (Ryzen 5xxx series) are beating the Apple M1 in single core score: https://browser.geekbench.com/v5/cpu/singlecore

As another datapoint Ian (of Anandtech) estimated that the M1 would need to be clocked at 3.25Ghz to match Zen 3, and these systems are showing a 3.2Ghz clock: https://twitter.com/IanCutress/status/1326516048309460992

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YetAnotherNick ◴[] No.25066720[source]
No, they aren't. All of the top results have crazy overclocking and liquid cooling. You need to look the numbers here: https://browser.geekbench.com/processor-benchmarks. Top end Zen 3 is slightly lower than M1.
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trynumber9 ◴[] No.25066806[source]
Not exactly.

You can check the clock speeds: https://browser.geekbench.com/v5/cpu/4620493.gb5

Up to 5050MHz is stock behavior for the 5950X and it's using standard DDR4 3200 memory.

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baybal2 ◴[] No.25067097[source]
Yet it still makes it very clear: a properly implemented ARM core can easily bury an X86 of equivalent size because of inherent advantage of not having to pay interest on 40 years of technical debt in the ISA.
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vbezhenar ◴[] No.25068040[source]
Because 5 nm better than 7 nm. That's about it. AMD Zen will be on par with Apple Silicone when they'll use 5 nm process.
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1. whizzter ◴[] No.25068719[source]
Actually i'd bet that you're both wrong. What M1 does well isn't that "ARM-is-better" or that they're using a smaller process (even if both factors probably plays into helping the M1 chips edge a few %).

Rather i suspect that the main benefit that M1 has in many real world benchmarks is that it has on-chip memory, cache-miss latency is a huge cost in the real world (why games has drifted towards DoD internals), so sidestepping that issue to a large extent by integrating memory on-die gives it a great boost.

I'm betting once they've reverse engineered the M1 perf, we will see multi-GB caches on AMD/Intel chips within 4 years.

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2. qayxc ◴[] No.25069586[source]
There's nothing to "reverse engineer" there: M1 has 4x the L1 cache and a wider bus. That's it.

This cannot be implemented in AMD's current 7nm process due to size restrictions.

The SoC-side of the story is also contrary to the very core design of a general purpose CPU. RAM, GPU, and extension cards for specialised tasks are already covered by 3rd party products on the PCIe and USB4 buses and AMD has no interest in cannibalising their GPU and console business...

With their upcoming discrete GPUs and accelerator cards, Intel might be in the same boat w.r.t. SoC design.

3. FrojoS ◴[] No.25069884[source]
The M1 has an L1 cache with less than 0.5 KB per core and an L2 with about 4 MB shared by all cores. https://en.wikipedia.org/wiki/Apple_M1
4. baybal2 ◴[] No.25081011[source]
> What M1 does well isn't that "ARM-is-better"

Of course, not all to it, but denying that having to emulate a 40 years old ISA does not place a huge cost on transistor count, and efficiency is impossible.