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Google's “Director of Engineering” Hiring Test

(www.gwan.com)
1764 points fatihky | 7 comments | 13 Oct 16 15:15 UTC | HN request time: 0.258s | source | bottom
1. Tempest1981 ◴[13 Oct 16 16:04 UTC] No.12701678[source]▶
On #9, is it 16-bit or 64-bit values? Sounds like you may have been answering a different question. Isn't the standard answer to use a 65536 entry lookup table?

Edit: oh, are you reinterpreting the array of 10000 16-bit integers as 2500 64-bit integers? But then what operation do you use on each?

Either way, if you find yourself arguing with the recruiter, it's probably a bad sign.

replies(2): >>12702694 #>>12703171 #
2. greyman ◴[13 Oct 16 17:57 UTC] No.12702694[source]▶
> Isn't the standard answer to use a 65536 entry lookup table?

Yes, it is, but is it such a common knowledge?

3. landhar ◴[13 Oct 16 19:02 UTC] No.12703171[source]▶
I thought the reason it was generally accepted that the 8-bit lookup table is optimal is because it can fit in the L1 cache.
replies(1): >>12703666 #
4. gcp ◴[13 Oct 16 20:13 UTC] No.12703666[source]▶
(Very) embedded developer speaking here. What's this L1 cache you speak of?
replies(1): >>12706639 #
5. joss82 ◴[14 Oct 16 07:43 UTC] No.12706639{3}[source]▶
It's level 1 CPU cache, the fastest (and smallest) cache.

It caches both instructions and data.

https://en.wikipedia.org/wiki/CPU_cache

replies(2): >>12707477 #>>12722595 #
6. phpnode ◴[14 Oct 16 11:48 UTC] No.12707477{4}[source]▶
GP is making the point that not all CPUs have a cache.
7. ummonk ◴[17 Oct 16 03:54 UTC] No.12722595{4}[source]▶
It was a joke. Some embedded processors lack a cache.