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1401 points alankay | 1 comments | | HN request time: 0s | source

This request originated via recent discussions on HN, and the forming of HARC! at YC Research. I'll be around for most of the day today (though the early evening).
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sebastianconcpt ◴[] No.11940121[source]
Hi Alan,

1. what do you think about the hardware we are using as foundation of computing today? I remember you mentioning about how cool was the architecture of the Burroughs B5000 [1] being prepared to run on the metal the higher level programming languages. What do hardware vendors should do to make hardware that is more friendly to higher level programming? Would that help us to be less depending on VM's while still enjoying silicon kind of performance?

2. What software technologies do you feel we're missing?

[1] https://en.wikipedia.org/wiki/Burroughs_large_systems

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alankay1 ◴[] No.11940224[source]
If you start with "desirable process" you can eventually work your way back to the power plug in the wall. If you start with something already plugged in, you might miss a lot of truly desirable processes.

Part of working your way back to reality can often require new hardware to be made or -- in the case of the days of microcode -- to shape the hardware.

There are lots of things vendors could do. For example: Intel could make its first level caches large enough to make real HLL emulators (and they could look at what else would help). Right now a plug-in or available FPGA could be of great use in many areas. From another direction, one could think of much better ways to organize memory architectures, especially for multi-core chips where they are quite starved.

And so on. We've gone very far down the road of "not very good" matchups, and of vendors getting programmers to make their CPUs useful rather than the exact opposite approach. This is too large a subject for today's AMA.

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1. adwn ◴[] No.11945386[source]
> Intel could make its first level caches large enough to make real HLL emulators

If you make the L1 cache larger, it will become slower and will be renamed to "L2 cache". There are physical reasons why the L1 cache is not larger, even though programs written in non-highlevel languages would profit from larger caches (maybe even moreso than HLL programs).

> Right now a plug-in or available FPGA could be of great use in many areas.

FPGAs are very, very HLL-unfriendly, despite lots of effort from industry and academia.