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Myths Programmers Believe about CPU Caches (2018)

(software.rajivprab.com)
149 points whack | 1 comments | 31 Oct 25 00:46 UTC | HN request time: 0.205s | source
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daemontus ◴[01 Nov 25 12:26 UTC] No.45781114[source]▶
I may be completely out of line here, but isn't the story on ARM very very different? I vaguely recall the whole point of having stuff like weak atomics being that on x86, those don't do anything, but on ARM they are essential for cache coherency and memory ordering? But then again, I may just be conflating memory ordering and coherency.
replies(2): >>45783040 #>>45784336 #
1. phire ◴[01 Nov 25 19:01 UTC] No.45784336[source]▶
Everything it says about cache coherency is exactly the same on ARM.

Memory ordering has nothing to do with cache coherency, it's all about what happens within the CPU pipeline itself. On ARM reads and writes can become reordered within the CPU pipeline itself, before they hit the caches (which are still fully coherent).

ARM still has strict memory ordering for code within a single core (some older processors do not), but the writes from one core might become visible to other cores in the wrong order.