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263 points chaosprint | 1 comments | | HN request time: 0s | source
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rasz ◴[] No.45756620[source]
Great hack from very talented hacker. Steve Markgraf is the author of High Speed Data Acquisition over HDMI https://github.com/steve-m/hsdaoh Capturing raw data using super cheap USB3 HDMI Video Capture dongles. Up to 175MB/s with Pico2 as the sender https://github.com/steve-m/hsdaoh-rp2350

Sadly 100Mbit might be the limit for bitbanging ethernet. While 1Gbit uses easily reachable 125MHz clock it also does full duplex requiring echo cancellation and I dont see an easy way around external PHY. The next PICO challenge is implementing GRMII PHY support for that sweet $1 RTL8211 1Gbit. I havent seen that done yet.

replies(2): >>45756801 #>>45764213 #
1. kees99 ◴[] No.45764213[source]
> 1Gbit uses easily reachable 125MHz clock

RGMII uses 4-bit bus, so that would be 250M state transitions per second.

Clock signal is 125MHz, yes. But data is sent/sampled at both edges (DDR), so PIO state machine has to be clocked at 250MHz.

That's still reachable with mild overclocking, I guess?