Raspberry Pi Pico Bit-Bangs 100 Mbit/S Ethernet

(www.elektormagazine.com)

263 points chaosprint | 1 comments | 29 Oct 25 23:21 UTC | HN request time: 0s | source

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ggm ◴[30 Oct 25 00:52 UTC] No.45755114[source]▶

this is classic computing wheel of life stuff (Bell, Mudge, MacNamara wrote that up in the 70s)

* first you do it in the cpu * then you do it in a dedicated card off the bus * then you find the FPGA or whatever too slow, so you make the card have it's own CPU * then you wind up recursing over the problem, implementing some logic in a special area of the cpu, to optimise its bus to the other bus to ...

I expect to come back in 10years and find there is a chiplet which took the rpi core, and implements a shrunk version which can be reprogrammed, into the chiplet on the offload card, so we can program terabit network drivers with a general purpose CPU model.

replies(2): >>45756793 #>>45757612 #

TZubiri ◴[30 Oct 25 08:25 UTC] No.45757612[source]▶

>>45755114 #

I understood some of these words

replies(1): >>45761193 #

1. Twirrim ◴[30 Oct 25 15:35 UTC] No.45761193[source]▶

>>45757612 #

We start out doing things in the CPU, create dedicated hardware for it externally, then slowly but surely bring it closer and closer to the CPU until we end up integrating the specialist capabilities into it. Often these capabilities enable other workloads to be done in the CPU, that we then build dedicated hardware for and the cycle continues.

An easy example is the 8087 maths coprocessor, from the early 80s. They were floating point accelerators, a separate chip you could plug into your motherboard, until eventually it was integrated into the CPU (386 and 486 processors had SX and DX variants, DX had the coprocessor integrated)

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